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CY62256NLL-70PXC 256K (32K x 8) Static RAM ic pc board circuit board ic

ChongMing Group (HK) Int'l Co., Ltd
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    Buy cheap CY62256NLL-70PXC 256K (32K x 8) Static RAM ic pc board circuit board ic from wholesalers
     
    Buy cheap CY62256NLL-70PXC 256K (32K x 8) Static RAM ic pc board circuit board ic from wholesalers
    • Buy cheap CY62256NLL-70PXC 256K (32K x 8) Static RAM ic pc board circuit board ic from wholesalers

    CY62256NLL-70PXC 256K (32K x 8) Static RAM ic pc board circuit board ic

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    Brand Name : CYPRESS
    Model Number : CY62256NLL-70PXC
    Certification : Original Factory Pack
    Price : Negotiation
    Payment Terms : T/T, Western Union,PayPal
    Supply Ability : 290PCS
    Delivery Time : 1 Day
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    CY62256NLL-70PXC 256K (32K x 8) Static RAM ic pc board circuit board ic



    CY62256NLL-70PXC 256K (32K x 8) Static RAM ic pc board circuit board ic


    Features

    ■ Temperature Ranges

    ❐ Commercial: 0°C to 70°C

    ❐ Industrial: –40°C to 85°C

    ❐ Automotive-A: –40°C to 85°C

    ❐ Automotive-E: –40°C to 125°C

    ■ High Speed: 55 ns

    ■ Voltage Range: 4.5V to 5.5V Operation

    ■ Low Active Power

    ❐ 275 mW (max)

    ■ Low Standby Power (LL version)

    ❐ 82.5 μW (max)

    ■ Easy Memory Expansion with CE and OE Features

    ■ TTL-Compatible Inputs and Outputs

    ■ Automatic Power Down when Deselected

    ■ CMOS for Optimum Speed and Power

    ■ Available in Pb-free and Non Pb-free 28-Pin (600-mil) PDIP,

    28-Pin (300-mil) Narrow SOIC, 28-Pin TSOP-I,

    and 28-Pin Reverse TSOP-I Packages


    Functional Description

    The CY62256N[1] is a high performance CMOS static RAM organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE) and active LOW output enable (OE) and tristate drivers. This device has an automatic power down feature, reducing the power consumption by 99.9 percent when deselected.


    An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A0 through A14). Reading the device is accomplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the eight data input/output pins.


    The input/output pins remain in a high impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH.


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