Off-Line SMPS Current Mode Controller with integrated 650V/800V
CoolMOS™
Product Highlights
• Best in class in DIP8, DIP7, TO220 and DSO16/12 packages
• No heat-sink required for DIP8, DIP7 and DSO16/12
• Increased creepage distance for TO220, DIP7 and DSO16/12
• Isolated drain for TO220 packages
• Lowest standby power dissipation
• Enhanced protection functions with Auto Restart Mode
• Pb-free lead plating for all packages; RoHS compliant
Features
• 650V/800V avalanche rugged CoolMOS™
• Only few external components required
• Input Vcc Undervoltage Lockout
• 67kHz/100kHz switching frequency
• Max duty cycle 72%
• Low Power Standby Mode to meet European Commission Requirements •
Thermal Shut Down with Auto Restart
• Overload and Open Loop Protection
• Overvoltage Protection during Auto Restart
• Adjustable Peak Current Limitation via external resistor
• Overall tolerance of Current Limiting < ±5%
Description
The second generation CoolSET™-F2 provides several special
enhancements to satisfy the needs for low power standby and
protection features. In standby mode frequency reduction is used to
lower the power consumption and support a stable output voltage in
this mode. The frequency reduction is limited to 20kHz/21.5 kHz to
avoid audible noise. In case of failure modes like open loop,
overvoltage or overload due to short circuit the device switches in
Auto Restart Mode which is controlled by the internal protection
unit. By means of the internal precise peak current limitation, the
dimension of the transformer and the secondary diode can be sized
lower which leads to more cost effective for the overall system.
Typical Application
1.3 Pin Configuration with PG-TO220-6-46/ 7
| Pin | Pin Symbol | Function |
| 1 | 1 Drain | 650V1) CoolMOS™ Drain |
| 3 | Isense | Controller Current Sense Input, CoolMOS™ Source Output |
| 4 | GND | Controller Ground |
| 5 | VCC | Controller Supply Voltage |
| 6 | SoftS | Soft-Start |
| 7 | FB | Feedback |
To improve the Current Mode during light load conditions the
amplified current ramp of the PWM-OP is superimposed on a voltage
ramp, which is built by the switch T2, the voltage source V1 and
the 1st order low pass filter composed of R1 and C1(see Figure 9,
Figure 10). Every time the oscillator shuts down for max. duty
cycle limitation the switch T2 is closed by VOSC. When the
oscillator triggers the Gate Driver T2 is opened so that the
voltage ramp can start.
